BT0068, Computer Organization and Architecture

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Assignment

DRIVE	FALL 2014
PROGRAM	BSc IT
SEMESTER	2
SUBJECT CODE & NAME	BT0068, Computer Organization and Architecture
BK ID	B0952
CREDIT & MARKS	4 CREDITS & 60 MARKS

Note: Answer all questions. Each question is followed by evaluation scheme.

1(a) Subtract (76425-28321) using 10’s complement. Show the steps.

Answer:  10’s complement of 28321 is 71679

       Then add   7 6 4 2 5
                       + 7 1 6 7 9

(b) Subtract (28531-345620) using 10’s complement. Show the steps.

Answer: It is obvious that the difference is negative. We
also have to

2 What do you mean by bus in computer system? Explain the bus structure.

Answer: A bus is a collection of wires that connect several devices within a computer system. When a word of data is transferred between units, all its bits are transferred in parallel. A computer must have some lines for addressing and control purposes.

Three main groupings of lines:

3 Explain the instruction format with diagram and examples.

Answer: The MIPS R2000/R3000 ISA has fixed-width 32 bit instructions. Fixed-width instructions are common for RISC processors because they make it easy to fetch instructions without having to decode. These instructions must be stored at word-aligned addresses.

The MIPS ISA instructions fall into three categories: R-type, I-type, and J-type. Not all ISAs divide their instructions this neatly. This is one reason

4 Explain the non-negative integers and negative integers representation.

Answer: A negative number is a real number that is less than zero. Such numbers are often used to represent the amount of a loss or absence. For example, a debt that is owed may be thought of as a negative asset, or a decrease in some quantity may be thought of as a negative increase. Negative numbers are used to describe values on a scale that goes below zero, such as the Celsius and Fahrenheit scales for temperature.

5 Explain the mapping functions between the main memory and CPU.

Answer: A CPU cache is a cache used by the central processing unit (CPU) of a computer to reduce the average time to access data from the main memory. The cache is a smaller, faster memory which stores copies of the data from frequently used main memory locations. Most CPUs have different independent caches, including instruction and data caches, where the data cache is usually organized as a hierarchy of more cache levels

6 Write a short note on DMA controller. Draw the diagram of it.

Answer: The controller for a device employing DMA must have the capability of generating address signals for the memory, as well as all of the memory control signals. The processor informs the DMA controller that data is available (or is to be placed into) a block of memory locations starting at a certain address in memory. The controller is also informed of the length of the data block.

Many hardware systems use DMA, including disk

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